Università telematica internazionale UNINETTUNO

Information and communication technologies engineering (Academic Year 2018/2019) - Computer Engineering

Computer architecture and digital system design


Video professors: Romeo Beccherelli - Istituto per la Microelettronica e Microsistemi (CNR-IMM) Università Telematica Internazionale Uninettuno (Roma - Italia)

Videolesson

Lesson n. 1: Digital Hardware Go to this videolesson
Lesson n. 2: Binary Numbers 1/2 Go to this videolesson
Lesson n. 3: Binary Numbers 2/2 Go to this videolesson
Lesson n. 4: Boolean Algebra Go to this videolesson
Lesson n. 5: Logic gates and boolean functions 1/2 Go to this videolesson
Lesson n. 6: Logic gates and boolean functions 2/2 Go to this videolesson
Lesson n. 7: Simplification of boolean functions and Karnaugh map Go to this videolesson
Lesson n. 8: Gate level minimisation Go to this videolesson
Lesson n. 9: Combinatorial Circuits 1/3 Go to this videolesson
Lesson n. 10: Combinatorial Circuits 2/3 Go to this videolesson
Lesson n. 11: Combinatorial Circuits 3/3 Go to this videolesson
Lesson n. 12: Synchronous sequential logic 1/3 Go to this videolesson
Lesson n. 13: Synchronous sequential logic 2/3 Go to this videolesson
Lesson n. 14: Synchronous sequential logic 3/3 Go to this videolesson
Lesson n. 15: Synchronous Sequential Logic: Registers and Counters Go to this videolesson
Lesson n. 16: Memories Go to this videolesson
Lesson n. 17: Programmable Logic Devices Go to this videolesson
Lesson n. 18: Design at the register Transfer Logic Level RTL 1/2 Go to this videolesson
Lesson n. 19: Design at the register Transfer Logic Level RTL 2/2 Go to this videolesson
Lesson n. 20: Design at the register Transfer Logic Level RTL - Examples Go to this videolesson
Lesson n. 21: Basic Structure of Computers 1/2 Go to this videolesson
Lesson n. 22: Basic Structure of Computers 2/2 Go to this videolesson
Lesson n. 23: Instruction Set Architecture 1/5 Go to this videolesson
Lesson n. 24: Instruction Set Architecture 2/5 Go to this videolesson
Lesson n. 25: Instruction Set Architecture 3/5 Go to this videolesson
Lesson n. 26: Instruction Set Architecture 4/5 Go to this videolesson
Lesson n. 27: Instruction Set Architecture 5/5 Go to this videolesson
Lesson n. 28: Basic Input/Output 1/2 Go to this videolesson
Lesson n. 29: Basic Input/Output 2/2 Go to this videolesson
Lesson n. 30: Software 1/2 Go to this videolesson
Lesson n. 31: Software 2/2 Go to this videolesson
Lesson n. 32: Basic Central Processing Unit 1/3 Go to this videolesson
Lesson n. 33: Basic Central Processing Unit 2/3 Go to this videolesson
Lesson n. 34: Basic Central Processing Unit 3/3 Go to this videolesson
Lesson n. 35: Pipelining 1/2 Go to this videolesson
Lesson n. 36: Pipelining 2/2 Go to this videolesson
Lesson n. 37: Input/Output Organisation 1/2 Go to this videolesson
Lesson n. 38: Input/Output Organisation 2/2 Go to this videolesson
Lesson n. 39: Memory System 1/2 Go to this videolesson
Lesson n. 40: Memory System 2/2 Go to this videolesson

Headquarter

Corso Vittorio Emanuele II, 39
00186 Roma - ITALIA
Tax code number: 97394340588
P.IVA: 13937651001

Certified mail

info@pec.uninettunouniversity.net

Student Secretariat

tel: +39 06 692076.70
tel: +39 06 692076.71
e-mail: info@uninettunouniversity.net

Videoconferencing

Library 1st floor: 90.147.90.157
Meeting Room 5th floor: 90.147.90.158

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